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As I'm sure most of you know, there is a bunch of new standards being thrust upon us in the current era of computing, many of them involving very old standards. BTX is looking to replace ATX for motherboard design, Serial ATA is looking to replace Parallel ATA for drive expansion and PCI-E is looking to replace AGP/PCI as the bus of choice.
They all require their own explanations, but today I'll only be covering PCI vs. PCI-E (and PCI-X) since it seems to have the most confusion. PCI means Peripheral Component Interconnect. PCI-E stands for PCI Express. PCI-X stands for PCI eXtended. This is integral to understanding, because if you say you are interested in PCI-X people will assume you mean the older PCI-X standard and not the newer PCI-E standard. Yes, I am aware this is what causes a lot of the confusion but I didn't set the name, so don't shoot the messenger. ![]() So what are the differences? PCI came into being (for all intents and purposes) with v2.0 in 1993. Intel designed it as a replacement for the ISA/EISA and VLB buses at the time, as well as offering an "open" replacement to IBM's Microchannel. It was a 32-bit bus running at 33mhz, capable of 133MBytes/second, extremely fast for the time (and for a number of years, until AGP in 1998). Unfortunately not much as changed since then. They came out with 64-bit/33mhz and 64-bit/66mhz PCI standards but they never really took off. Most things really don't require the bandwidth so manufacturers just stuck with the lowest common denominator, the original 32/33. The downside to the PCI bus is that it's 133MBytes/s over the whole channel. This means that if your soundcard is taking 25MB/s and your network card is taking 50MB/s and your PCI videocard is taking 60MB/s then your entire PCI bus is saturated and system performance drags. Since this was a rarity for a long time it wasn't an issue. Then videocards got more and more powerful so they decided "hey, we really need a special bus just for the asynchronous transfer of videocards" and thus AGP was born. And this effectively freed up a lot of PCI bandwidth. But then gigabit ethernet/fiber came into play and Ultra160 (160MB/s) SCSI came out and manufacturers were like "this PCI bus is extremely limiting!" So Intel (and the others in the PCI guild) went back to the drawing board and came up with PCI-X. PCI-X's goal was to provide more bandwidth while still being backwards compatible, unlike AGP which had come out before. They wanted people to be able to put PCI-X cards into standard PCI slots and still have them work, albeit at a reduced rate. To this end PCI-X increased the bus size from 32-bit to 64-bit and the bus speed from 33/66mhz to 133mhz per channel. This allowed for 1066MB/s per channel. Over 1GB/s should be plenty, right? It is. However, there's two caveats to the PCI-X standard: 1) To get 1066MB/s you can only have 1 device per PCI-X channel, and most chipsets only allow you to have 2 channels (because the signalling overhead is massive). To this end they allowed the splitting of a single 64/133 channel into TWO 64/100 channels or FOUR 64/66 channels. This allowed you two devices at 533MB/s each or four devices at 266MB/s each. Generally today you'll see motherboards with 1x133mhz and 2x100mhz. This brings us to the second caveat. 2) Like PCI, the slowest device on the chain sets the speed. Let's say you have 2x100mhz or 4x66mhz PCI-X slots; you need to put a standard PCI 32/33 card into one of the slots. You've now effectively crippled your entire bus down to basic PCI 32/33 speeds. Because of this motherboard manufacturers were extremely limited with the amount of PCI-X slots they could put on since they also had to leave enough open PCI 32/33 slots for expansion. For the most part however, PCI-X solved the bandwidth problems and all was well with the world. None-the-less the PCI board decided to go back to the drawing board yet again and this time come up with a whole new standard based on the serial signalling that was overtaking the computer world. Serial signalling goes way back. In the beginning you could send 1-bit at a time, a 1 or a 0. Progress was made when someone figured out how to send 2 (or more) bits at a time, thus creating parallel signalling. Now people could 2 or 3 or 4 things at once! By the time PCI-X came around people were up to 64-bit data paths (or more)! However, during this time of parallel expansion people started noticing that the more bus lanes you had the more chances you had for accidents, such as collisions and interference causing lost packets. So someone said "hey, remember that serial signalling we used to do, sending just one packet at a time? What if we send one packet a time again but using modern cabling and techniques send it *really fast*?" And thus Firewire/IEEE.1392 was born. Instead of having massively wide cables sending a whole bunch of data relatively slow they use thin cables to send 1 bit at a time extremely fast. By the time a parallel cable had moved 1MB of data a serial cable would've moved 5MB. Think of it like a schoolbus compared to a Ducati motorcycle. Firewire started a whole round of innovation within the computer industry. The ATA group announced Serial ATA to replace Parallel ATA, the SCSI group announced Serial-Attached-SCSI based on Serial ATA and the PCI group announced PCI-Express. PCI-E was a complete change over from the old PCI standard. Instead of running on fat parallel lane it ran on a narrow serial lane. PCI-E x1 (x1 being 1 lane; you can have 1, 2, 4, 8, 12, 16, 24 or 32 lanes) runs at around 250MB/s. x2 is 500MB/s, and so on up until x32 with 8GB/s. Generally today you see some PCI-E x1 slots for basic peripherals (soundcards, 10/100/1000 ethernet cards, modems, etc), x4/x8 for server peripherals currently using PCI-X (U320 SCSI, 10Gbit ethernet) and x16 slots for videocards. There's nothing planned currently for x24 or x32 slots. As you can see above PCI-E isn't a basic serial connection though. It uses serial transfers but with parallel expansion. Single-lane serial connections are limited from the get-go without specification changes. The PCI group decided to just start with x1 and plan out to x32 (basically 32-bit again) in advance. PCI-E x1 slots are extremely small, about 1/5th the size of a PCI slot and 1/10th the size of a PCI-X slot. PCI-E x16 slots are about the same length as an AGP slot. Because PCI-E is a complete break from the PCI spec it is not backwards compatible. PCI cards will not work in PCI-E slots and vice versa. It is backwards compatible in the fact that it's a physical layer change only. If manufacturers wanted to they could switch out the connector on current PCI bus components and throw on a PCI-E connector and the device would never know the difference. It's only because of a lack of PCI-E motherboards that they don't. The biggest advantage of PCI-E is that every slot is it's own channel. It's not 250MB/s for the whole bus; it's 250MB/s per device. This means that if you have four PCI-E devices each one will get 250MB/s instead of each one getting 33MB/s like PCI. This was the PCI group's biggest accomplishment in PCI-E. No more will an x1 device slow down an x16 device. Anyhow I hope this solves some of the confusion of the new PCI-E standard and if you have any more questions or would like to correct me, feel free to PM me and let me know. -MrD |
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#2
by
PCJ
on
01-06-2005, 04:00 PM
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excellent. I'll be referring people to this article if they get something wrong.
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#3
by
gurutoo
on
01-06-2005, 06:40 PM
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Your article in a word - Outstanding!
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#4
by
tituswolf
on
01-10-2005, 01:04 AM
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wow, very good
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#5
by
MrDigital
on
01-10-2005, 01:29 AM
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Thanks for the comments everyone.
-MrD |
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